Wired Connections

• 40G Ethernet MAC and PHY
• Interlaken up to 16 serdes lanes of 112.5Gbps
• PCIe Gen 3/4/5 PCS and Controller design
• Expertise in developing them as soft IP or Hard IP using technologies up to 7nm
• Parametrized approach to design for ASIC or FPGA
• Design of deep packet processing